MIT.nano’s shared experimental facilities, primarily located in the Lisa T. Su Building at MIT, are a central resource for the entire campus, as well as qualified users from industry, academia, and government. Since opening to users in 2019, the 100,000 square feet of active lab spaces have built up capabilities for nanoscale patterning; extensive film and device processing from pieces to 8” wafers of silicon, compound semiconductors, 2-D films, nanotubes/nanowires, semiconductive oxides; as well as sheet area additive processing over 12” rigid or flexible substrates of nanostructured solids. Extensive materials characterization facilities exist both within and outside of cleanrooms, with demonstrated imaging at sub-atomic resolution down to 60 picometers.

MIT.nano also serves as a liaison for users to Lincoln Laboratory's Microelectronics Laboratory (ML), a 200 mm wafer processing facility, equipped with commercial-class cassette-to-cassette fabrication equipment and professionally staffed 24 hours a day, five days a week. This 90 nm-class facility operates full-flow fabrication across a broad range of integrated circuit technologies, including FD-SOI CMOS, CCD imagers, superconducting electronics, photonics, MEMs, and microfluidics.

MIT.nano collaborates with Lincoln Laboratory to offer the ML's prototyping services to companies. The ML is well suited for work needing large wafers, small features, and process control systems to demonstrate uniformity, repeatability process integration, or other commercial insertion risk reduction. More information